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How do I generate a schematic block diagram from Verilog

Quartus Prime Pro Edition Help version 19.2 - intel
Block Diagram/Schematic File (New Dialog Box) Show Commands (View Menu) Constant Properties Dialog Box; Create Design File from Selected Block Dialog Box; Create HDL Design File for Current File Dialog Box Intel ® Quartus
fpga - How to assign constant value to bus in Quartus II
Thanks for contributing an answer to Electrical Engineering Stack Exchange! Please be sure to answer the questionide details and share your research! But avoid . Asking for help, clarification, or responding to other answers.[PDF]
University of Florida EEL 3701 Dr. Eric M. Schwartz 26-Oct
Using a Bus in Quartus Block Diagram/Schematic (bdf) Files 1 Figure 2: Schematic entry file demonstrating buses. Figure 1 : Bus symbol circled in red. In Quartus schematic entry (bdf) files you can use busses. There is a thick wire symbol, circled in red in Figure 1, which denotes a bus.[PDF]
Altera Quartus II Tutorial - Computer Science and Engineering
Altera Quartus II zThe Quartus II development software provides a complete design environment for FPGA designs. zDesign entry using schematics, block diagrams, VHDL, and Verilog HDL . zDesign analysis and synthesis, fitting, assembling, timing analysis, simulation.
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